Logic Synthesis For Low Power Vlsi Designs
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Logic Synthesis for Low Power VLSI Designs
Author: Sasan Iman
language: en
Publisher: Springer Science & Business Media
Release Date: 1998
Logic Synthesis for Low Power VLSI Designs presents a systematic and comprehensive treatment of power modeling and optimization at the logic level. More precisely, this book provides a detailed presentation of methodologies, algorithms and CAD tools for power modeling, estimation and analysis, synthesis and optimization at the logic level. Logic Synthesis for Low Power VLSI Designs contains detailed descriptions of technology-dependent logic transformations and optimizations, technology decomposition and mapping, and post-mapping structural optimization techniques for low power. It also emphasizes the trade-off techniques for two-level and multi-level logic circuits that involve power dissipation and circuit speed, in the hope that the readers can better understand the issues and ways of achieving their power dissipation goal while meeting the timing constraints. Logic Synthesis for Low Power VLSI Designs is written for VLSI design engineers, CAD professionals, and students who have had a basic knowledge of CMOS digital design and logic synthesis.
Logic Synthesis for Low Power VLSI Designs
Author: Sasan Iman
language: en
Publisher: Springer Science & Business Media
Release Date: 2012-12-06
Logic Synthesis for Low Power VLSI Designs presents a systematic and comprehensive treatment of power modeling and optimization at the logic level. More precisely, this book provides a detailed presentation of methodologies, algorithms and CAD tools for power modeling, estimation and analysis, synthesis and optimization at the logic level. Logic Synthesis for Low Power VLSI Designs contains detailed descriptions of technology-dependent logic transformations and optimizations, technology decomposition and mapping, and post-mapping structural optimization techniques for low power. It also emphasizes the trade-off techniques for two-level and multi-level logic circuits that involve power dissipation and circuit speed, in the hope that the readers can better understand the issues and ways of achieving their power dissipation goal while meeting the timing constraints. Logic Synthesis for Low Power VLSI Designs is written for VLSI design engineers, CAD professionals, and students who have had a basic knowledge of CMOS digital design and logic synthesis.
Low Power VLSI Design and Technology
Low-power and low-energy VLSI has become an important issue in today's consumer electronics.This book is a collection of pioneering applied research papers in low power VLSI design and technology.A comprehensive introductory chapter presents the current status of the industry and academic research in the area of low power VLSI design and technology.Other topics cover logic synthesis, floorplanning, circuit design and analysis, from the perspective of low power requirements.The readers will have a sampling of some key problems in this area as the low power solutions span the entire spectrum of the design process. The book also provides excellent references on up-to-date research and development issues with practical solution techniques.