Fpgas And Parallel Architectures For Aerospace Applications

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FPGAs and Parallel Architectures for Aerospace Applications

This book introduces the concepts of soft errors in FPGAs, as well as the motivation for using commercial, off-the-shelf (COTS) FPGAs in mission-critical and remote applications, such as aerospace. The authors describe the effects of radiation in FPGAs, present a large set of soft-error mitigation techniques that can be applied in these circuits, as well as methods for qualifying these circuits under radiation. Coverage includes radiation effects in FPGAs, fault-tolerant techniques for FPGAs, use of COTS FPGAs in aerospace applications, experimental data of FPGAs under radiation, FPGA embedded processors under radiation and fault injection in FPGAs. Since dedicated parallel processing architectures such as GPUs have become more desirable in aerospace applications due to high computational power, GPU analysis under radiation is also discussed.
AI-Enabled Electronic Circuit and System Design

As our world becomes increasingly digital, electronics underpin nearly every industry. Understanding how AI enhances this foundational technology can unlock innovations, from smarter homes to more powerful gadgets, offering vast opportunities for businesses and consumers alike. This book demystifies how AI streamlines the creation of electronic systems, making them smarter and more efficient. With AI’s transformative impact on various engineering fields, this resource provides an up-to-date exploration of these advancements, authored by experts actively engaged in this dynamic field. Stay ahead in the rapidly evolving landscape of AI in engineering with “AI-Enabled Electronic Circuit and System Design: From Ideation to Utilization,” your essential guide to the future of electronic systems. !--[endif]--A transformative guide describing how revolutionizes electronic design through AI integration. Highlighting trends, challenges and opportunities; Demystifies complex AI applications in electronic design for practical use; Leading insights, authored by top experts actively engaged in the field; Offers a current, relevant exploration of significant topics in AI’s role in electronic circuit and system design. Editor’s bios. Dr. Ali A. Iranmanesh is the founder and CEO of Silicon Valley Polytechnic Institute. He has received his Bachelor of Science in Electrical Engineering from Sharif University of Technology (SUT), Tehran, Iran, and both his master’s and Ph.D. degrees in Electrical Engineering and Physics from Stanford University in Stanford, CA. He additionally holds a master’s degree in business administration (MBA) from San Jose State University in San Jose, CA. Dr. Iranmanesh is the founder and chairman of the International Society for Quality Electronic Design (ISQED). Currently, he serves as the CEO of Innovotek. Dr. Iranmanesh has been instrumental in advancing semiconductor technologies, innovative design methodologies, and engineering education. He holds nearly 100 US and international patents, reflecting his signifi cant contributions to the field. Dr. Iranmanesh is the Senior life members of EEE, senior member of the American Society for Quality, co-founder and Chair Emeritus of the IEEE Education Society of Silicon Valley, Vice Chair Emeritus of the IEEE PV chapter, and recipient of IEEE Outstanding Educator Award. Dr. Hossein Sayadi is a Tenure-Track Assistant Professor and Associate Chair in the Department of Computer Engineering and Computer Science at California State University, Long Beach (CSULB). He earned his Ph.D. in Electrical and Computer Engineering from George Mason University in Fairfax, Virginia, and an M.Sc. in Computer Engineering from Sharif University of Technology in Tehran, Iran. As a recognized researcher with over 14 years of research experience, Dr. Sayadi is the founder and director of the Intelligent, Secure, and Energy-Efficient Computing (iSEC) Lab at CSULB. His research focuses on advancing hardware security and trust, AI and machine learning, cybersecurity, and energy-efficient computing, addressing critical challenges in modern computing and cyber-physical systems. He has authored over 75 peer-reviewed publications in leading conferences and journals. Dr. Sayadi is the CSU STEM-NET Faculty Fellow, with his research supported by multiple National Science Foundation (NSF) grants and awards from CSULB and the CSU Chancellor’s Office. He has contributed to various international conferences as an organizer and program committee member, including as the TPC Chair for the 2024 and 2025 IEEE ISQED.
Separation Logic for High-level Synthesis

This book presents novel compiler techniques, which combine a rigorous mathematical framework, novel program analyses and digital hardware design to advance current high-level synthesis tools and extend their scope beyond the industrial ‘state of the art’. Implementing computation on customised digital hardware plays an increasingly important role in the quest for energy-efficient high-performance computing. Field-programmable gate arrays (FPGAs) gain efficiency by encoding the computing task into the chip’s physical circuitry and are gaining rapidly increasing importance in the processor market, especially after recent announcements of large-scale deployments in the data centre. This is driving, more than ever, the demand for higher design entry abstraction levels, such as the automatic circuit synthesis from high-level languages (high-level synthesis). The techniques in this book apply formal reasoning to high-level synthesis in the context of demonstrably practical applications. /pp