Design And Characterisation Of Monolithic Cmos Detectors For High Energy Particle Physics And Seu Radiation Tests For Atlas Inner Tracker Upgrade Readout Chip

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Design and Characterization in Depleted CMOS Technology for Particle Physics Pixel Detector

The ATLAS experiment will start operating at the High Luminosity LHC accelerator (HL-LHC) in 2026 to increase the probability of new discoveries. Depleted CMOS monolithic pixel detector technology has been one of the options considered for the outer layer of an upgraded ATLAS pixel detector and is a high potential technology for future pixel detectors. In this thesis, several prototypes have been developed using different depleted CMOS technologies, for instance, LFoundry (LF) 150 nm, TowerJazz (TJ) 180 nm and austriamicrosystems AG (AMS) 180 nm. In a high-energy environment like HL-LHC, Single Event Upsets (SEU), which become of concern for reliable circuit operation. Several test-chips in AMS, TowerJazz and LFoundry technologies with different SEU tolerant structures have been prototyped and tested. The SEU tolerant structures were designed with appropriate electronics simulations using Computer Aided Design (CAD) tools in order to study the sensitivity of injected charge to upset a memory state. An alternative powering scheme named Serial Powering scheme is foreseen for the future Inner Tracker (ITk) detector of the ATLAS experiment. To meet the requirements ofthe ATLAS experiment to the environment of a pixelated layer in a high radiation collider environment, new developments with depleted CMOS sensors have been made in Shunt-LDO regulator and sensor biasing which are designed in modified TowerJazz 180 nm CMOS imaging technology. In the TowerJazz modified process, two different voltage levels are used for the purpose of sensor depletion. The bias voltages are generated by using a negative charge pump circuit.
Depleted CMOS Sensor Development for Pixel Particle Detectors Under High Intensity and High Radiative Dose

The Inner Tracker (ITk) system of the ATLAS experiment will be upgraded for the 2026 High Luminosity Large Hadron Collider (HL-LHC) run. The HL-LHC will operate with a center of mass energy of 14 TeV and a peak instantaneous luminosity five times higher than at present. The increased luminosity will result in roughly ten times higher radiation levels and data rates. To cope with the ATLAS requirements in terms of radiation hardness, readout speed and granularity at the HL-LHC, the replacement of the present ATLAS Inner Tracker (ITk) is needed. Two large-scale depleted CMOS sensors in the 150 nm LF-technology called LF-CPIX and LF-MONOPIX, developed in the framework of the ATLAS Inner Tracker (ITK) upgrade for High Luminosity LHC. The work presented here shows the characterization for these three prototypes, with contributions concerning the setup development, 55Fe and 90Sr source calibration, modifications of the FPGA firmware and development of test programs. A main concern was the investigation on the radiation hardness for both the electronics and the sensor parts. We will show results concerning characterizations for these prototypes in the laboratory performance at CPPM, as well as results in multiple radiation campaigns performed at the 24 GeV IRRAD proton facility at CERN, to study the effects of Non-Ionizing Energy Loss (NIEL) and Total Ionizing Dose (TID) on the prototypes.