Vlsi Planarization
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VLSI Planarization
Author: V.Z. Feinberg
language: en
Publisher: Springer Science & Business Media
Release Date: 2012-12-06
At the beginning we would like to introduce a refinement. The term 'VLSI planarization' means planarization of a circuit of VLSI, Le. the embedding of a VLSI circuit in the plane by different criteria such as the minimum number of connectors, the minimum total length of connectors, the minimum number of over-the-element routes, etc. A connector is designed to connect the broken sections of a net. It can be implemented in different ways depending on the technology. Connectors for a bipolar VLSI are implemented by diffused tun nels, for instance. By over-the-element route we shall mean a connection which intersects the enclosing rectangle of an element (or a cell). The possibility of the construction such connections during circuit planarization is reflected in element models and can be ensured, for example, by the availability of areas within the rectangles where connections may be routed. VLSI planarization is one of the basic stages (others will be discussed below) of the so called topological (in the mathematical sense) approach to VLSI design. This approach does not lie in the direction of the classical approach to automation of VLSI layout design. In the classical approach to computer aided design the placement and routing problems are solved successively. The topological approach, in contrast, allows one to solve both problems at the same time. This is achieved by constructing a planar embedding of a circuit and obtaining the proper VLSI layout on the basis of it.
Chemical Mechanical Planarization of Microelectronic Materials
The concluding chapter describes post-CMP cleaning techniques, and most chapters feature problem sets to assist readers in developing a more practical understanding of CMP. The only comprehensive reference to one of the fastest growing integrated circuit manufacturing technologies, Chemical Mechanical Planarization of Microelectronic Materials is an important resource for research scientists and engineers working in the microelectronics industry.
Advanced CMOS Process Technology
Advanced CMOS Process Technology is part of the VLSI Electronics Microstructure Science series. The main topic of this book is complementary metal-oxide semiconductor or CMOS technology, which plays a significant part in the electronics systems. The topics covered in this book range from metallization, isolation techniques, reliability, and yield. The volume begins with an introductory chapter that discusses the microelectronics revolution of the 20th century. Then Chapter 2 puts focus on the CMOS devices and circuit background, discussing CMOS capacitors and field effect transistors. Metallization topics and concepts are covered in Chapter 3, while isolation techniques are tackled in Chapter 4. Long-term reliability of CMOS is the topic covered in Chapter 5. Finally, the ability of semiconductor technology to yield circuits is discussed in Chapter 6. The book is particularly addressed to engineers, scientists, and technical managers.