Vlsi Architectures For Future Video Coding

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VLSI Architectures for Future Video Coding

Author: Maurizio Martina
language: en
Publisher: Institution of Engineering and Technology
Release Date: 2019-08-12
This book addresses future video coding from the perspective of hardware implementation and architecture design, with particular focus on approximate computing and the energy-quality scalability paradigm. Challenges in deploying VLSI architectures for video coding are identified and potential solutions postulated with reference to recent research in the field. The book offers systematic coverage of the designs, techniques and paradigms that will most likely be exploited in the design of VLSI architectures for future video coding systems.
High Efficiency Video Coding and Other Emerging Standards

High Efficiency Video Coding and Other Emerging Standards provides an overview of high efficiency video coding (HEVC) and all its extensions and profiles. There are nearly 300 projects and problems included, and about 400 references related to HEVC alone. Next generation video coding (NGVC) beyond HEVC is also described. Other video coding standards such as AVS2, DAALA, THOR, VP9 (Google), DIRAC, VC1, and AV1 are addressed, and image coding standards such as JPEG, JPEG-LS, JPEG2000, JPEG XR, JPEG XS, JPEG XT and JPEG-Pleno are also listed.Understanding of these standards and their implementation is facilitated by overview papers, standards documents, reference software, software manuals, test sequences, source codes, tutorials, keynote speakers, panel discussions, reflector and ftp/web sites – all in the public domain. Access to these categories is also provided.