System Level Design Techniques For Energy Efficient Embedded Systems
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System-Level Design Techniques for Energy-Efficient Embedded Systems
System-Level Design Techniques for Energy-Efficient Embedded Systems addresses the development and validation of co-synthesis techniques that allow an effective design of embedded systems with low energy dissipation. The book provides an overview of a system-level co-design flow, illustrating through examples how system performance is influenced at various steps of the flow including allocation, mapping, and scheduling. The book places special emphasis upon system-level co-synthesis techniques for architectures that contain voltage scalable processors, which can dynamically trade off between computational performance and power consumption. Throughout the book, the introduced co-synthesis techniques, which target both single-mode systems and emerging multi-mode applications, are applied to numerous benchmarks and real-life examples including a realistic smart phone.
System-Level Design Techniques for Energy-Efficient Embedded Systems
Author: Marcus T. Schmitz
language: en
Publisher: Springer Science & Business Media
Release Date: 2004
"System-Level Design Techniques for Energy-Efficient Embedded Systems will be of interest to advanced undergraduates, graduate students, and designers."--BOOK JACKET.
Energy-Efficient Fault-Tolerant Systems
Author: Jimson Mathew
language: en
Publisher: Springer Science & Business Media
Release Date: 2013-09-07
This book describes the state-of-the-art in energy efficient, fault-tolerant embedded systems. It covers the entire product lifecycle of electronic systems design, analysis and testing and includes discussion of both circuit and system-level approaches. Readers will be enabled to meet the conflicting design objectives of energy efficiency and fault-tolerance for reliability, given the up-to-date techniques presented.