Pyfhe A Python Library For Fully Homomorphic Encryption

PyFHE - a Python Library for Fully Homomorphic Encryption

Fully homomorphic encryption (FHE) schemes often entail complex lattice operations and error associated with addition and multiplication, making them a challenge to implement. While a few lattice cryptography libraries exist in C++, there is no such library in Python, a language which allows simplicity and readability, making it ideal for prototyping. Many such libraries also do not include bootstrapping, the most complicated operation of FHE schemes. We present a new Python library pyFHE for fully homomorphic encryption schemes, which currently includes the Brakerski-Fan-Vercauteren (BFV) scheme, the Cheon-Kim-Kim-Song (CKKS) scheme, and bootstrapping for CKKS.

XeHE: an Intel GPU Accelerated Fully Homomorphic Encryption Library

XeHE: an Intel GPU Accelerated Fully Homomorphic Encryption Library: A SYCL Sparkler: Making the Most of C++ and SYCL

This installment of a "SYCL Sparkler" explores in depth a way to implement a reasonably efficient implementation for Homomorphic Encryption using modern C++ with SYCL. As a result of their work, the authors learned some valuable optimization techniques and insights that the they have taken time to share in this very interesting and detailed piece. A key value of using C++ with SYCL, is the ability to be portable while supporting the ability to optimize at a lower level when it is deemed worth the effort. This work helps illustrate how the authors isolated that optimization work, and their thought process on how to pick what to optimize. The code for this implementation is available open source online. None of the performance numbers shown are intended to provide guidance on hardware selection. The authors offer their results and observations to illustrate the magnitude of changes that may correspond to the optimizations being discussed. Readers will find the information valuable to motivate their own optimization work on their applications using some of the techniques highlighted by these authors. Key Insights shared include: pros/cons of a hand-tuned vISA, memory allocation overheads, multi-tile scaling, event-based profiling, algorithm tuning, measuring of device throughput, developing with 'dualities' to increase portability and performance portability.