Practical Formal Software Engineering
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Practical Formal Software Engineering
Author: Bruce Mills
language: en
Publisher: Cambridge University Press
Release Date: 2009-01-19
Based around a theme of the construction of a game engine, this textbook is for final year undergraduate and graduate students, emphasising formal methods in writing robust code quickly. This book takes an unusual, engineering-inspired approach to illuminate the creation and verification of large software systems . Where other textbooks discuss business practices through generic project management techniques or detailed rigid logic systems, this book examines the interaction between code in a physical machine and the logic applied in creating the software. These elements create an informal and rigorous study of logic, algebra, and geometry through software. Assuming prior experience with C, C++, or Java programming languages, chapters introduce UML, OCL, and Z from scratch. Extensive worked examples motivate readers to learn the languages through the technical side of software science.
Formal Methods and Software Engineering
This book constitutes the refereed proceedings of the 20th International Conference on Formal Engineering Methods, ICFEM 2018, held in Gold Coast, QLD, Australia, in November 2018. The 22 revised full papers presented together with 14 short papers were carefully reviewed and selected from 66 submissions. The conference focuses on all areas related to formal engineering methods, such as verification; network systems; type theory; theorem proving; logic and semantics; refinement and transition systems; and emerging applications of formal methods.
Practical Formal Methods for Hardware Design
Author: Carlos Delgado Kloos
language: en
Publisher: Springer Science & Business Media
Release Date: 2012-12-06
Formal methods for hardware design still find limited use in industry. Yet current practice has to change to cope with decreasing design times and increasing quality requirements. This research report presents results from the Esprit project FORMAT (formal methods in hardware verification) which involved the collaboration of the enterprises Siemens, Italtel, Telefonica I+D, TGI, and AHL, the research institute OFFIS, and the universities of Madrid and Passau. The work presented involves advanced specification languages for hardware design that are intuitive to the designer, like timing diagrams and state based languages, as well as their relation to VHDL and formal languages like temporal logic and a process-algebraic calculus. The results of experimental tests of the tools are also presented.