Power Hardware In The Loop Based Anti Islanding Evaluation And Demonstration


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Power Hardware-in-the-loop-based Anti-islanding Evaluation and Demonstration


Power Hardware-in-the-loop-based Anti-islanding Evaluation and Demonstration

Author: Karl Schoder

language: en

Publisher:

Release Date: 2015


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The National Renewable Energy Laboratory (NREL) teamed with Southern California Edison (SCE), Clean Power Research (CPR), Quanta Technology (QT), and Electrical Distribution Design (EDD) to conduct a U.S. Department of Energy (DOE) and California Public Utility Commission (CPUC) California Solar Initiative (CSI)-funded research project investigating the impacts of integrating high-penetration levels of photovoltaics (PV) onto the California distribution grid. One topic researched in the context of high-penetration PV integration onto the distribution system is the ability of PV inverters to (1) detect islanding conditions (i.e., when the distribution system to which the PV inverter is connected becomes disconnected from the utility power connection) and (2) disconnect from the islanded system within the time specified in the performance specifications outlined in IEEE Standard 1547. This condition may cause damage to other connected equipment due to insufficient power quality (e.g., over-and under-voltages) and may also be a safety hazard to personnel that may be working on feeder sections to restore service. NREL teamed with the Florida State University (FSU) Center for Advanced Power Systems (CAPS) to investigate a new way of testing PV inverters for IEEE Standard 1547 unintentional islanding performance specifications using power hardware-in-loop (PHIL) laboratory testing techniques.

Power Hardware-in-the-Loop-Based Anti-Islanding Evaluation and Demonstration


Power Hardware-in-the-Loop-Based Anti-Islanding Evaluation and Demonstration

Author:

language: en

Publisher:

Release Date: 2015


DOWNLOAD





The National Renewable Energy Laboratory (NREL) teamed with Southern California Edison (SCE), Clean Power Research (CPR), Quanta Technology (QT), and Electrical Distribution Design (EDD) to conduct a U.S. Department of Energy (DOE) and California Public Utility Commission (CPUC) California Solar Initiative (CSI)-funded research project investigating the impacts of integrating high-penetration levels of photovoltaics (PV) onto the California distribution grid. One topic researched in the context of high-penetration PV integration onto the distribution system is the ability of PV inverters to (1) detect islanding conditions (i.e., when the distribution system to which the PV inverter is connected becomes disconnected from the utility power connection) and (2) disconnect from the islanded system within the time specified in the performance specifications outlined in IEEE Standard 1547. This condition may cause damage to other connected equipment due to insufficient power quality (e.g., over-and under-voltages) and may also be a safety hazard to personnel that may be working on feeder sections to restore service. NREL teamed with the Florida State University (FSU) Center for Advanced Power Systems (CAPS) to investigate a new way of testing PV inverters for IEEE Standard 1547 unintentional islanding performance specifications using power hardware-in-loop (PHIL) laboratory testing techniques.

A HARDWARE-IN-THE-LOOP EXPERIMENTAL TESTBED FOR THE EVALUATION OF POWER GRID STABILITY AND SECURITY


A HARDWARE-IN-THE-LOOP EXPERIMENTAL TESTBED FOR THE EVALUATION OF POWER GRID STABILITY AND SECURITY

Author: James Kollmer

language: en

Publisher:

Release Date: 2020


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This research presents the development of a hardware-in-the-loop testbed for a three-bus power grid interfaced with a simulated networked control system (NCS) for investigation of cyberattacks and their possible impacts on the power grid. The three-bus grid consists of two generator buses, configured as slack bus (constant voltage and angle) and PV bus (constant power and constant voltage), and a load bus (PQ bus). The synchronous generators are driven by dynamometers serving as prime movers, and the field circuits controlled by insulated gate bipolar junction transistors (IGBT). The load bus is comprised of resistors, capacitors, and inductors that are connected to the generator buses through transmission lines. The simulated NCS is implemented on an Opal-RT platform, which is a PC/FPGA based real-time simulator that can integrate hardware with software based simulations, commonly referred to as hardware-in-the-loop (HIL). In general, HIL setups have the advantage that physical elements under test interact in real time with a simulated model of a large scale system and provide a better insight of performance of both the physical system and the controller. In this HIL experimental setup, the data acquisition unit (DAQ), and the controller are both implemented on the Opal-RT platform. A baseline for the behavior of the three-bus system is first established by operating the generator under various load conditions for which the controller maintains the desired terminal voltage. Then various types of cyberattacks were initiated on the system that include bias attack, data attack, and Denial-of-Service (DoS) attacks. The closed loop generator control system maintained the stability of the system as well as the required bus voltages within a certain tolerance. With no attack prevention mechanism in place, the developed experimental platform provides a facility to observe and evaluate the impacts of various cyberattacks on a real physical microgrid.