Power Constrained Testing Of Vlsi Circuits
Download Power Constrained Testing Of Vlsi Circuits PDF/ePub or read online books in Mobi eBooks. Click Download or Read Online button to get Power Constrained Testing Of Vlsi Circuits book now. This website allows unlimited access to, at the time of writing, more than 1.5 million titles, including hundreds of thousands of titles in various foreign languages.
Power-Constrained Testing of VLSI Circuits
Author: Nicola Nicolici
language: en
Publisher: Springer Science & Business Media
Release Date: 2006-04-11
This text focuses on techniques for minimizing power dissipation during test application at logic and register-transfer levels of abstraction of the VLSI design flow. It surveys existing techniques and presents several test automation techniques for reducing power in scan-based sequential circuits and BIST data paths.
Power-Constrained Testing of VLSI Circuits
Author: Nicola Nicolici
language: en
Publisher: Springer Science & Business Media
Release Date: 2003-02-28
This text focuses on techniques for minimizing power dissipation during test application at logic and register-transfer levels of abstraction of the VLSI design flow. It surveys existing techniques and presents several test automation techniques for reducing power in scan-based sequential circuits and BIST data paths.
Introduction to Advanced System-on-Chip Test Design and Optimization
Author: Erik Larsson
language: en
Publisher: Springer Science & Business Media
Release Date: 2006-03-30
SOC test design and its optimization is the topic of Introduction to Advanced System-on-Chip Test Design and Optimization. It gives an introduction to testing, describes the problems related to SOC testing, discusses the modeling granularity and the implementation into EDA (electronic design automation) tools. The book is divided into three sections: i) test concepts, ii) SOC design for test, and iii) SOC test applications. The first part covers an introduction into test problems including faults, fault types, design-flow, design-for-test techniques such as scan-testing and Boundary Scan. The second part of the book discusses SOC related problems such as system modeling, test conflicts, power consumption, test access mechanism design, test scheduling and defect-oriented scheduling. Finally, the third part focuses on SOC applications, such as integrated test scheduling and TAM design, defect-oriented scheduling, and integrating test design with the core selection process.