Optimization Of Cmos Analog Amplifiers Using Genetic Algorithms

Optimization of CMOS Analog Amplifiers Using Genetic Algorithms

Application of Evolutionary Algorithms for Multi-objective Optimization in VLSI and Embedded Systems

This book describes how evolutionary algorithms (EA), including genetic algorithms (GA) and particle swarm optimization (PSO) can be utilized for solving multi-objective optimization problems in the area of embedded and VLSI system design. Many complex engineering optimization problems can be modelled as multi-objective formulations. This book provides an introduction to multi-objective optimization using meta-heuristic algorithms, GA and PSO and how they can be applied to problems like hardware/software partitioning in embedded systems, circuit partitioning in VLSI, design of operational amplifiers in analog VLSI, design space exploration in high-level synthesis, delay fault testing in VLSI testing and scheduling in heterogeneous distributed systems. It is shown how, in each case, the various aspects of the EA, namely its representation and operators like crossover, mutation, etc, can be separately formulated to solve these problems. This book is intended for design engineers and researchers in the field of VLSI and embedded system design. The book introduces the multi-objective GA and PSO in a simple and easily understandable way that will appeal to introductory readers.

Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects

This book introduces readers to a variety of tools for automatic analog integrated circuit (IC) sizing and optimization. The authors provide a historical perspective on the early methods proposed to tackle automatic analog circuit sizing, with emphasis on the methodologies to size and optimize the circuit, and on the methodologies to estimate the circuit’s performance. The discussion also includes robust circuit design and optimization and the most recent advances in layout-aware analog sizing approaches. The authors describe a methodology for an automatic flow for analog IC design, including details of the inputs and interfaces, multi-objective optimization techniques, and the enhancements made in the base implementation by using machine leaning techniques. The Gradient model is discussed in detail, along with the methods to include layout effects in the circuit sizing. The concepts and algorithms of all the modules are thoroughly described, enabling readers to reproduce the methodologies, improve the quality of their designs, or use them as starting point for a new tool. An extensive set of application examples is included to demonstrate the capabilities and features of the methodologies described.