Models For Large Integrated Circuits
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Models for Large Integrated Circuits
Author: Patrick DeWilde
language: en
Publisher: Springer Science & Business Media
Release Date: 2012-12-06
A modern microelectronic circuit can be compared to a large construction, a large city, on a very small area. A memory chip, a DRAM, may have up to 64 million bit locations on a surface of a few square centimeters. Each new generation of integrated circuit- generations are measured by factors of four in overall complexity -requires a substantial increase in density from the current technology, added precision, a decrease of the size of geometric features, and an increase in the total usable surface. The microelectronic industry has set the trend. Ultra large funds have been invested in the construction of new plants to produce the ultra large-scale circuits with utmost precision under the most severe conditions. The decrease in feature size to submicrons -0.7 micron is quickly becoming availabl- does not only bring technological problems. New design problems arise as well. The elements from which microelectronic circuits are build, transistors and interconnects, have different shape and behave differently than before. Phenomena that could be neglected in a four micron technology, such as the non-uniformity of the doping profile in a transistor, or the mutual capacitance between two wires, now play an important role in circuit design. This situation does not make the life of the electronic designer easier: he has to take many more parasitic effects into account, up to the point that his ideal design will not function as originally planned.
Models for Large Integrated Circuits
A modern microelectronic circuit can be compared to a large construction, a large city, on a very small area. A memory chip, a DRAM, may have up to 64 million bit locations on a surface of a few square centimeters. Each new generation of integrated circuit- generations are measured by factors of four in overall complexity -requires a substantial increase in density from the current technology, added precision, a decrease of the size of geometric features, and an increase in the total usable surface. The microelectronic industry has set the trend. Ultra large funds have been invested in the construction of new plants to produce the ultra large-scale circuits with utmost precision under the most severe conditions. The decrease in feature size to submicrons -0.7 micron is quickly becoming availabl- does not only bring technological problems. New design problems arise as well. The elements from which microelectronic circuits are build, transistors and interconnects, have different shape and behave differently than before. Phenomena that could be neglected in a four micron technology, such as the non-uniformity of the doping profile in a transistor, or the mutual capacitance between two wires, now play an important role in circuit design. This situation does not make the life of the electronic designer easier: he has to take many more parasitic effects into account, up to the point that his ideal design will not function as originally planned.
Compact Models for Integrated Circuit Design
Compact Models for Integrated Circuit Design: Conventional Transistors and Beyond provides a modern treatise on compact models for circuit computer-aided design (CAD). Written by an author with more than 25 years of industry experience in semiconductor processes, devices, and circuit CAD, and more than 10 years of academic experience in teaching compact modeling courses, this first-of-its-kind book on compact SPICE models for very-large-scale-integrated (VLSI) chip design offers a balanced presentation of compact modeling crucial for addressing current modeling challenges and understanding new models for emerging devices. Starting from basic semiconductor physics and covering state-of-the-art device regimes from conventional micron to nanometer, this text: Presents industry standard models for bipolar-junction transistors (BJTs), metal-oxide-semiconductor (MOS) field-effect-transistors (FETs), FinFETs, and tunnel field-effect transistors (TFETs), along with statistical MOS models Discusses the major issue of process variability, which severely impacts device and circuit performance in advanced technologies and requires statistical compact models Promotes further research of the evolution and development of compact models for VLSI circuit design and analysis Supplies fundamental and practical knowledge necessary for efficient integrated circuit (IC) design using nanoscale devices Includes exercise problems at the end of each chapter and extensive references at the end of the book Compact Models for Integrated Circuit Design: Conventional Transistors and Beyond is intended for senior undergraduate and graduate courses in electrical and electronics engineering as well as for researchers and practitioners working in the area of electron devices. However, even those unfamiliar with semiconductor physics gain a solid grasp of compact modeling concepts from this book.