Interconnect Technology And Design For Gigascale Integration
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Interconnect Technology and Design for Gigascale Integration
Author: Jeffrey A. Davis
language: en
Publisher: Springer Science & Business Media
Release Date: 2012-12-06
Interconnect Technology and Design for Gigascale Integration is the cumulative effort from academic researchers at Georgia Tech, MIT, and Stanford, as well as from industry researchers at IBM T.J. Watson Research Center, LSI Logic, and SUN microsystems. The material found in this book is unique in that it spans IC interconnect topics ranging from IBM's revolutionary copper process to an in depth exploration into interconnect-aware computer architectures. This broad swath of topics presented by leaders in the research field is intended to provide a comprehensive perspective on interconnect technology and design issues so that the reader will understand the implications of the semiconductor industry's next substantial milestone - gigascale integration.
Integrated Interconnect Technologies for 3D Nanoelectronic Systems
This cutting-edge book on off-chip technologies puts the hottest breakthroughs in high-density compliant electrical interconnects, nanophotonics, and microfluidics at your fingertips, integrating the full range of mathematics, physics, and technology issues together in a single comprehensive source. You get full details on state-of-the-art I/O interconnects and packaging, including mechanically compliant I/O approaches, fabrication, and assembly, followed by the latest advances and applications in power delivery design, analysis, and modeling. The book explores interconnect structures, materials, and packages for achieving high-bandwidth off-chip electrical communication, including optical interconnects and chip-to-chip signaling approaches, and brings you up to speed on CMOS integrated optical devices, 3D integration, wafer stacking technology, and through-wafer interconnects.
Copper Interconnect Technology
Author: Tapan Gupta
language: en
Publisher: Springer Science & Business Media
Release Date: 2010-01-22
Since overall circuit performance has depended primarily on transistor properties, previous efforts to enhance circuit and system speed were focused on transistors as well. During the last decade, however, the parasitic resistance, capacitance, and inductance associated with interconnections began to influence circuit performance and will be the primary factors in the evolution of nanoscale ULSI technology. Because metallic conductivity and resistance to electromigration of bulk copper (Cu) are better than aluminum, use of copper and low-k materials is now prevalent in the international microelectronics industry. As the feature size of the Cu-lines forming interconnects is scaled, resistivity of the lines increases. At the same time electromigration and stress-induced voids due to increased current density become significant reliability issues. Although copper/low-k technology has become fairly mature, there is no single book available on the promise and challenges of these next-generation technologies. In this book, a leader in the field describes advanced laser systems with lower radiation wavelengths, photolithography materials, and mathematical modeling approaches to address the challenges of Cu-interconnect technology.