Hardware Verification
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Hardware Verification with System Verilog
Author: Mike Mintz
language: en
Publisher: Springer Science & Business Media
Release Date: 2007-05-03
This is the second of our books designed to help the professional verifier manage complexity. This time, we have responded to a growing interest not only in object-oriented programming but also in SystemVerilog. The writing of this second handbook has been just another step in an ongoing masochistic endeavor to make your professional lives as painfree as possible. The authors are not special people. We have worked in several companies, large and small, made mistakes, and generally muddled through our work. There are many people in the industry who are smarter than we are, and many coworkers who are more experienced. However, we have a strong desire to help. We have been in the lab when we bring up the chips fresh from the fab, with customers and sales breathing down our necks. We’ve been through software 1 bring-up and worked on drivers that had to work around bugs in production chips. What we feel makes us unique is our combined broad experience from both the software and hardware worlds. Mike has over 20 years of experience from the software world that he applies in this book to hardware verification. Robert has over 12 years of experience with hardware verification, with a focus on environments and methodology.
Verification Plans
Author: Peet James
language: en
Publisher: Springer Science & Business Media
Release Date: 2003-10-31
The task of verification is always larger than the task of the design effort. Why? Because the verification system has to encompass the entire functionality of the device under verification. It has to mimic the real world environment that the device will actual operate in. It needs to catch functional errors. It needs to give feedback information to guide further verification. The design effort proceeds from a design specification. Verification systems need to proceed from a verification plan. A comprehensive document that describes the verification system and all its components. A plan that details how the verification system will be built. With the advent of hardware verification languages, today's verifications systems have grown in complexity making verification plans even more paramount. This book is a practical guide on how to get a verification team jumpstarted into verification success by the joint creation of a verification plan. The book includes: -A detailed five day approach that gives day by day, step by step instructions on how to design and document your verification system. -An introduction to hardware verification languages, their pseudo-random mindset, their enabling methodologies (generation, checking and coverage), and how these effect the development of a verification plan. -Practical guidance in common people issues, formatting decisions and information extraction methods to enhance your verification plan brainstorming sessions. -An appendix full of verification plan examples and support documents.
Hardware Verification with C++
Author: Mike Mintz
language: en
Publisher: Springer Science & Business Media
Release Date: 2006-12-11
Describes a small verification library with a concentration on user adaptability such as re-useable components, portable Intellectual Property, and co-verification. Takes a realistic view of reusability and distills lessons learned down to a tool box of techniques and guidelines.