Domain Specific Processors


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Domain-Specific Processors


Domain-Specific Processors

Author: Shuvra S. Bhattacharyya

language: en

Publisher: CRC Press

Release Date: 2003-11-11


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Ranging from low-level application and architecture optimizations to high-level modeling and exploration concerns, this authoritative reference compiles essential research on various levels of abstraction appearing in embedded systems and software design. It promotes platform-based design for improved system implementation and modeling and enhanced

Ultra-Low Energy Domain-Specific Instruction-Set Processors


Ultra-Low Energy Domain-Specific Instruction-Set Processors

Author: Francky Catthoor

language: en

Publisher: Springer Science & Business Media

Release Date: 2010-08-05


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Modern consumers carry many electronic devices, like a mobile phone, digital camera, GPS, PDA and an MP3 player. The functionality of each of these devices has gone through an important evolution over recent years, with a steep increase in both the number of features as in the quality of the services that they provide. However, providing the required compute power to support (an uncompromised combination of) all this functionality is highly non-trivial. Designing processors that meet the demanding requirements of future mobile devices requires the optimization of the embedded system in general and of the embedded processors in particular, as they should strike the correct balance between flexibility, energy efficiency and performance. In general, a designer will try to minimize the energy consumption (as far as needed) for a given performance, with a sufficient flexibility. However, achieving this goal is already complex when looking at the processor in isolation, but, in reality, the processor is a single component in a more complex system. In order to design such complex system successfully, critical decisions during the design of each individual component should take into account effect on the other parts, with a clear goal to move to a global Pareto optimum in the complete multi-dimensional exploration space. In the complex, global design of battery-operated embedded systems, the focus of Ultra-Low Energy Domain-Specific Instruction-Set Processors is on the energy-aware architecture exploration of domain-specific instruction-set processors and the co-optimization of the datapath architecture, foreground memory, and instruction memory organisation with a link to the required mapping techniques or compiler steps at the early stages of the design. By performing an extensive energy breakdown experiment for a complete embedded platform, both energy and performance bottlenecks have been identified, together with the important relations between the different components. Based on this knowledge, architecture extensions are proposed for all the bottlenecks.

Architecture of Computing Systems - ARCS 2007


Architecture of Computing Systems - ARCS 2007

Author: Paul Lukowicz

language: en

Publisher: Springer Science & Business Media

Release Date: 2007-03-05


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This book constitutes the refereed proceedings of the 20th International Conference on Architecture of Computing Systems, ARCS 2007, held in Zurich, Switzerland in March 2007. Coverage details a broad range of research topics related to basic technology, architecture, and application of computing systems with a strong focus on system aspects of pervasive computing and self organization techniques in both organic and autonomic computing.