Digital Timing Macromodeling For Vlsi Design Verification


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Digital Timing Macromodeling for VLSI Design Verification


Digital Timing Macromodeling for VLSI Design Verification

Author: Jeong-Taek Kong

language: en

Publisher: Springer Science & Business Media

Release Date: 2012-12-06


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Digital Timing Macromodeling for VLSI Design Verification first of all provides an extensive history of the development of simulation techniques. It presents detailed discussion of the various techniques implemented in circuit, timing, fast-timing, switch-level timing, switch-level, and gate-level simulation. It also discusses mixed-mode simulation and interconnection analysis methods. The review in Chapter 2 gives an understanding of the advantages and disadvantages of the many techniques applied in modern digital macromodels. The book also presents a wide variety of techniques for performing nonlinear macromodeling of digital MOS subcircuits which address a large number of shortcomings in existing digital MOS macromodels. Specifically, the techniques address the device model detail, transistor coupling capacitance, effective channel length modulation, series transistor reduction, effective transconductance, input terminal dependence, gate parasitic capacitance, the body effect, the impact of parasitic RC-interconnects, and the effect of transmission gates. The techniques address major sources of errors in existing macromodeling techniques, which must be addressed if macromodeling is to be accepted in commercial CAD tools by chip designers. The techniques presented in Chapters 4-6 can be implemented in other macromodels, and are demonstrated using the macromodel presented in Chapter 3. The new techniques are validated over an extremely wide range of operating conditions: much wider than has been presented for previous macromodels, thus demonstrating the wide range of applicability of these techniques.

High-Performance Digital VLSI Circuit Design


High-Performance Digital VLSI Circuit Design

Author: Richard X. Gu

language: en

Publisher: Springer Science & Business Media

Release Date: 2012-12-06


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High-Performance Digital VLSI Circuit Design is the first book devoted entirely to the design of digital high-performance VLSI circuits. CMOS, BiCMOS and bipolar ciruits are covered in depth, including state-of-the-art circuit structures. Recent advances in both the computer and telecommunications industries demand high-performance VLSI digital circuits. Digital processing of signals demands high-speed circuit techniques for the GHz range. The design of such circuits represents a great challenge; one that is amplified when the power supply is scaled down to 3.3 V. Moreover, the requirements of low-power/high-performance circuits adds an extra dimension to the design of such circuits. High-Performance Digital VLSI Circuit Design is a self-contained text, introducing the subject of high-performance VLSI circuit design and explaining the speed/power tradeoffs. The first few chapters of the book discuss the necessary background material in the area of device design and device modeling, respectively. High-performance CMOS circuits are then covered, especially the new all-N-logic dynamic circuits. Propagation delay times of high-speed bipolar CML and ECL are developed analytically to give a thorough understanding of various interacting process, device and circuit parameters. High-current phenomena of bipolar devices are also addressed as these devices typically operate at maximum currents for limited device area. Different, new, high-performance BiCMOS circuits are presented and compared to their conventional counterparts. These new circuits find direct applications in the areas of high-speed adders, frequency dividers, sense amplifiers, level-shifters, input/output clock buffers and PLLs. The book concludes with a few system application examples of digital high-performance VLSI circuits. Audience: A vital reference for practicing IC designers. Can be used as a text for graduate and senior undergraduate students in the area.

Algorithms for VLSI Design Automation


Algorithms for VLSI Design Automation

Author: Sabih H. Gerez

language: en

Publisher: John Wiley & Sons

Release Date: 1999-01-05


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Modern microprocessors such as Intel's Pentium chip typically contain many millions of transistors. They are known generically as Very Large-Scale Integrated (VLSI) systems, and their sheer scale and complexity has necessitated the development of CAD tools to automate their design. This book focuses on the algorithms which are the building blocks of the design automation software which generates the layout of VLSI circuits. Courses on this area are typically elective courses taken at senior undergrad or graduate level by students of Electrical and Electronic Engineering, and sometimes in Computer Science, or Computer Engineering.