Development Of High Efficiency And High Linearity Power Amplifiers
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Development of High Efficiency and High Linearity Power Amplifiers
Power amplifiers typically dominate transmitter and system characteristics. They have the highest DC power consumption, power dissipation, and heat dissipation. Power MMICs have the largest chip area which means higher cost. Modern communication digital modulation techniques require that PAs should have high linear characteristics. On the other hand, PAs are required to be efficient to decrease power consumption and to extend the operation life of battery operated devices. Gallium Nitride PAs became the focus of industry in the last decade. They provide the highest power density among other technologies, as well as providing high efficiency and are suitable for wide bandwidth applications. On the other hand, they suffer from soft compression, AM/AM and AM/PM distortions at higher levels compared to GaAs and Si based devices. Also, since GaN is considered a new technology power gain decreases for mm-wave frequencies. In this Ph.D. research, we address 3 problems: linearity, efficiency and gain of mm-wave power amplifiers. We present 4 contributions; First, we demonstrate the design of a linear and high efficient power amplifier (PA) by using different gate bias voltages for parallelly combined Gallium Nitride (GaN) high electron mobility transistors (HEMTs). The experimental results show that the linearized PA achieves the gain flatness of 0.3 dB over a 35 dB power range and has a measured sharp output power at 1 dB compression point (P1dB) of 38.5 dBm, less than 2 dB below the saturated power (P[subscript SAT]). The measured adjacent channel power ratio (ACPR) of the proposed linearized PA shows up to 8 dB improvements over the PA biased ~ class A (47% Idss) Second, we propose a new modulating load range for a Doherty power amplifier (DPA) that will maintain maximum drain voltage swing and consequently peak efficiency in over 6-dB power back-off (PBO). At 6-dB PBO, the real part of the new modulating load seen by the main amplifier is less than 2*R[subscript opt]. The new load range allows for the design of a compact, low loss output matching and combiner circuit and a simple single drain bias line for the main and auxiliary amplifiers. The proposed 2-stage DPA using the new modulating loads is designed at 15 GHZ in a 0.15 [mu]m enhancement mode (E-mode) Gallium Arsenide (GaAs) pseudomorphic high electron mobility transistor (pHEMT) process. The proposed DPA achieves a measured P[subscript sat] of 27 dBm, a peak power added efficiency (PAE) of 41% and a PAE of 34% at 6 dB PBO with a gain of 17 dB. Third, we propose an extended range Doherty power amplifier (DPA) to achieve high efficiency at 9-dB power back-off (PBO) using a novel loading impedance range. The proposed loading impedance range enables the auxiliary transistor to deliver more current so that symmetric devices can be used in the DPA and results in a compact and low loss output combining circuit. A 20-Watt DPA using Gallium nitride high electron mobility transistors (GaN HEMTs) at 3.5 GHz has been developed to demonstrate the concept. Measurements show power added efficiency (PAE) of 69% at 42.9 dBm saturation output power, PAE of 55% at 9-dB PBO, and gain of 12 dB. We believe our proposed DPA has the highest 9-dB PBO PAE of 55% among reported GaN DPA’s. Finally, we introduce an inductive feedback technique to enhance the gain of mm-wave power amplifiers. A 3-stage 60 GHz PA was designed with 22 dB gain and output power of almost 1-watt.
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