Design Of The Risc V Instruction Set Architecture
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Design of the RISC-V Instruction Set Architecture
The hardware-software interface, embodied in the instruction set architecture (ISA), is arguably the most important interface in a computer system. Yet, in contrast to nearly all other interfaces in a modern computer system, all commercially popular ISAs are proprietary. A free and open ISA standard has the potential to increase innovation in microprocessor design, reduce computer system cost, and, as Moore's law wanes, ease the transition to more specialized computational devices. In this dissertation, I present the RISC-V instruction set architecture. RISC-V is a free and open ISA that, with three decades of hindsight, builds and improves upon the original Reduced Instruction Set Computer (RISC) architectures. It is structured as a small base ISA with a variety of optional extensions. The base ISA is very simple, making RISC-V suitable for research and education, but complete enough to be a suitable ISA for inexpensive, low-power embedded devices. The optional extensions form a more powerful ISA for general-purpose and high-performance computing. I also present and evaluate a new RISC-V ISA extension for reduced code size, which makes RISC-V more compact than all popular 64-bit ISAs.
Computer Organization and Design RISC-V Edition
Author: David A. Patterson
language: en
Publisher: Morgan Kaufmann
Release Date: 2017-05-12
The new RISC-V Edition of Computer Organization and Design features the RISC-V open source instruction set architecture, the first open source architecture designed to be used in modern computing environments such as cloud computing, mobile devices, and other embedded systems. With the post-PC era now upon us, Computer Organization and Design moves forward to explore this generational change with examples, exercises, and material highlighting the emergence of mobile computing and the Cloud. Updated content featuring tablet computers, Cloud infrastructure, and the x86 (cloud computing) and ARM (mobile computing devices) architectures is included. An online companion Web site provides advanced content for further study, appendices, glossary, references, and recommended reading. - Features RISC-V, the first such architecture designed to be used in modern computing environments, such as cloud computing, mobile devices, and other embedded systems - Includes relevant examples, exercises, and material highlighting the emergence of mobile computing and the cloud
Digital Design and Computer Architecture, RISC-V Edition
The newest addition to the Harris and Harris family of Digital Design and Computer Architecture books, this RISC-V Edition covers the fundamentals of digital logic design and reinforces logic concepts through the design of a RISC-V microprocessor. Combining an engaging and humorous writing style with an updated and hands-on approach to digital design, this book takes the reader from the fundamentals of digital logic to the actual design of a processor. By the end of this book, readers will be able to build their own RISC-V microprocessor and will have a top-to-bottom understanding of how it works. Beginning with digital logic gates and progressing to the design of combinational and sequential circuits, this book uses these fundamental building blocks as the basis for designing a RISC-V processor. SystemVerilog and VHDL are integrated throughout the text in examples illustrating the methods and techniques for CAD-based circuit design. The companion website includes a chapter on I/O systems with practical examples that show how to use SparkFun's RED-V RedBoard to communicate with peripheral devices such as LCDs, Bluetooth radios, and motors. This book will be a valuable resource for students taking a course that combines digital logic and computer architecture or students taking a two-quarter sequence in digital logic and computer organization/architecture. - Covers the fundamentals of digital logic design and reinforces logic concepts through the design of a RISC-V microprocessor - Gives students a full understanding of the RISC-V instruction set architecture, enabling them to build a RISC-V processor and program the RISC-V processor in hardware simulation, software simulation, and in hardware - Includes both SystemVerilog and VHDL designs of fundamental building blocks as well as of single-cycle, multicycle, and pipelined versions of the RISC-V architecture - Features a companion website with a bonus chapter on I/O systems with practical examples that show how to use SparkFun's RED-V RedBoard to communicate with peripheral devices such as LCDs, Bluetooth radios, and motors - The companion website also includes appendices covering practical digital design issues and C programming as well as links to CAD tools, lecture slides, laboratory projects, and solutions to exercises - See the companion EdX MOOCs ENGR85A and ENGR85B with video lectures and interactive problems