Design Analysis And Test Of Logic Circuits Under Uncertainty
Download Design Analysis And Test Of Logic Circuits Under Uncertainty PDF/ePub or read online books in Mobi eBooks. Click Download or Read Online button to get Design Analysis And Test Of Logic Circuits Under Uncertainty book now. This website allows unlimited access to, at the time of writing, more than 1.5 million titles, including hundreds of thousands of titles in various foreign languages.
Design, Analysis and Test of Logic Circuits Under Uncertainty
Author: Smita Krishnaswamy
language: en
Publisher: Springer Science & Business Media
Release Date: 2012-09-21
Logic circuits are becoming increasingly susceptible to probabilistic behavior caused by external radiation and process variation. In addition, inherently probabilistic quantum- and nano-technologies are on the horizon as we approach the limits of CMOS scaling. Ensuring the reliability of such circuits despite the probabilistic behavior is a key challenge in IC design---one that necessitates a fundamental, probabilistic reformulation of synthesis and testing techniques. This monograph will present techniques for analyzing, designing, and testing logic circuits with probabilistic behavior.
Advanced Techniques in Logic Synthesis, Optimizations and Applications
Author: Kanupriya Gulati
language: en
Publisher: Springer Science & Business Media
Release Date: 2010-11-25
This book covers recent advances in the field of logic synthesis and design, including Boolean Matching, Logic Decomposition, Boolean satisfiability, Advanced Synthesis Techniques and Applications of Logic Design. All of these topics are valuable to CAD engineers working in Logic Design, Logic Optimization, and Verification. Engineers seeking opportunities for optimizing VLSI integrated circuits will find this book as an invaluable reference, since there is no existing book that covers this material in a systematic fashion.
Analysis and Design of Resilient VLSI Circuits
Author: Rajesh Garg
language: en
Publisher: Springer Science & Business Media
Release Date: 2009-10-22
This monograph is motivated by the challenges faced in designing reliable VLSI systems in modern VLSI processes. The reliable operation of integrated circuits (ICs) has become increasingly dif?cult to achieve in the deep submicron (DSM) era. With continuouslydecreasing device feature sizes, combinedwith lower supply voltages and higher operating frequencies, the noise immunity of VLSI circuits is decreasing alarmingly. Thus, VLSI circuits are becoming more vulnerable to noise effects such as crosstalk, power supply variations, and radiation-inducedsoft errors. Among these noise sources, soft errors(or error caused by radiation particle strikes) have become an increasingly troublesome issue for memory arrays as well as c- binational logic circuits. Also, in the DSM era, process variations are increasing at a signi?cant rate, making it more dif?cult to design reliable VLSI circuits. Hence, it is important to ef?ciently design robust VLSI circuits that are resilient to radiation particle strikes and process variations. The work presented in this research mo- graph presents several analysis and design techniques with the goal of realizing VLSI circuits, which are radiation and process variation tolerant.