Current Sense Amplifiers For Embedded Sram In High Performance System On A Chip Design

Current Sense Amplifiers for Embedded SRAM in High-Performance System-on-a-Chip Designs

System-on-a-chip (SoC) designs result in a wide range of high-complexity, high-value semiconductor products. As the technology scales towards smaller feature sizes and chips grow larger, a speed limitation arises due to an in creased RC delay associated with interconnection wires. Innovative circuit techniques are required to achieve the speed needed for high-performance signal processing. Current sensing is considered as a promising circuit class since it is inherently faster than conventional voltage sense amplifiers. How ever, especially in SRAM, current sensing has rarely been used so far. Practi cal implementations are challenging because they require sophisticated analog circuit techniques in a digital environment. The objective of this book is to provide a systematic and comprehen sive insight into current sensing techniques. Both theoretical and practical aspects are covered. Design guidelines are derived by systematic analysis of different circuit principles. Innovative concepts like compensation of the bit line multiplexer and auto-power-down will be explained based on theory and experimental results. The material will be interesting for design engineers in industry as well as researchers who want to learn about and apply current sensing techniques. The focus is on embedded SRAM but the material presented can be adapted to single-chip SRAM and to any other current-providing memory type as well. This includes emerging memory technologies like magnetic RAM (MRAM) and Ovonic Unified Memory (OUM). Moreover, it is also applicable to array like structures such as CMOS camera chips and to circuits for signal trans mission along highly capacitive busses.

Current Sense Amplifiers for Embedded SRAM in High Performance System on a Chip Design

VLSI Design and Test

This book constitutes the refereed proceedings of the 17th International Symposium on VLSI Design and Test, VDAT 2013, held in Jaipur, India, in July 2013. The 44 papers presented were carefully reviewed and selected from 162 submissions. The papers discuss the frontiers of design and test of VLSI components, circuits and systems. They are organized in topical sections on VLSI design, testing and verification, embedded systems, emerging technology.