Computer Aided Design Techniques For Low Power Sequential Logic Circuits

Computer-Aided Design Techniques for Low Power Sequential Logic Circuits

Rapid increases in chip complexity, increasingly faster clocks, and the proliferation of portable devices have combined to make power dissipation an important design parameter. The power consumption of a digital system determines its heat dissipation as well as battery life. For some systems, power has become the most critical design constraint. Computer-Aided Design Techniques for Low Power Sequential Logic Circuits presents a methodology for low power design. The authors first present a survey of techniques for estimating the average power dissipation of a logic circuit. At the logic level, power dissipation is directly related to average switching activity. A symbolic simulation method that accurately computes the average switching activity in logic circuits is then described. This method is extended to handle sequential logic circuits by modeling correlation in time and by calculating the probabilities of present state lines. Computer-Aided Design Techniques for Low Power Sequential Logic Circuits then presents a survey of methods to optimize logic circuits for low power dissipation which target reduced switching activity. A method to retime a sequential logic circuit where registers are repositioned such that the overall glitching in the circuit is minimized is also described. The authors then detail a powerful optimization method that is based on selectively precomputing the output logic values of a circuit one clock cycle before they are required, and using the precomputed value to reduce internal switching activity in the succeeding clock cycle. Presented next is a survey of methods that reduce switching activity in circuits described at the register-transfer and behavioral levels. Also described is a scheduling algorithm that reduces power dissipation by maximising the inactivity period of the modules in a given circuit. Computer-Aided Design Techniques for Low Power Sequential Logic Circuits concludes with a summary and directions for future research.

Computer-Aided Design Techniques for Low Power Sequential Logic Circuits

Advanced Low-Power Digital Circuit Techniques

Advanced Low-Power Digital Circuit Techniques presents several novel high performance digital circuit designs that emphasize low-power and low-voltage operation. These circuits represent a wide range of circuits that are used in state-of-the-art VLSI systems and hence serve as good examples for low-power design. Each chapter contains a brief introduction that serves as a quick background and gives the motivation behind the design. Each chapter also ends with a summary that briefly explains the contributions contained therein. This makes the book very readable. The reader can skim through the chapters very quickly to get a feel for the design problems presented in the book and the solutions proposed by the authors. Examples of circuits used in systems where low-power is important from reliability and portability points of view (such as general-purpose and DSP processors) are presented in Chapters 2, 3 and 4. Chapters 5 and 7 give examples of circuits used in systems where reliability and more system integration are the main driving forces behind lowering the power consumption. Chapter 6 gives an example of a general purpose high-performance low-power circuit design. Advanced Low-Power Digital Circuit Techniques is a real designer's book. It investigates alternative circuit styles, as well as architectural alternatives, and gives quantitative results for comparison in realistic technologies. Several of the circuits presented have been fabricated so that simulations can be checked. The circuits covered are the most important building blocks for many designs, so the text will be of direct use to designers. MOS designs are covered, as well as BiCMOS, and there are several novel circuits.