Communication Channel Synthesis For Heterogeneous Embedded Systems

Communication Channel Synthesis for Heterogeneous Embedded Systems

IEEE International Workshop on Rapid Systems Prototyping

Contains papers from a June 1999 workshop which brought together system designers, model and tool developers, integrated circuit designers, and software engineers to explore problems and techniques in the area of rapid system prototyping. Papers focus on models for system simulation/emulation in a hierarchical sense, software-to- hardware mapping, software prototyping and validation, prototyping environments of hardware simulators, and experiences from specific system prototyping projects. Contains sections on communication and distributed systems, reconfigurable architectures, reuse, formal methods, design methodologies, interface technologies, and FPGA-based design. Lacks a subject index. Annotation copyrighted by Book News, Inc., Portland, OR.

Analysis and Synthesis of Distributed Real-Time Embedded Systems

Embedded computer systems are now everywhere: from alarm clocks to PDAs, from mobile phones to cars, almost all the devices we use are controlled by embedded computers. An important class of embedded computer systems is that of hard real-time systems, which have to fulfill strict timing requirements. As real-time systems become more complex, they are often implemented using distributed heterogeneous architectures. Analysis and Synthesis of Distributed Real-Time Embedded Systems addresses the design of real-time applications implemented using distributed heterogeneous architectures. The systems are heterogeneous not only in terms of hardware components, but also in terms of communication protocols and scheduling policies. Regarding this last aspect, time-driven and event-driven systems, as well as a combination of the two, are considered. Such systems are used in many application areas like automotive electronics, real-time multimedia, avionics, medical equipment, and factory systems. The proposed analysis and synthesis techniques derive optimized implementations that fulfill the imposed design constraints. An important part of the implementation process is the synthesis of the communication infrastructure, which has a significant impact on the overall system performance and cost. Analysis and Synthesis of Distributed Real-Time Embedded Systems considers the mapping and scheduling tasks within an incremental design process. To reduce the time-to-market of products, the design of real-time systems seldom starts from scratch. Typically, designers start from an already existing system, running certain applications, and the design problem is to implement new functionality on top of this system. Supporting such an incremental design process provides a high degree of flexibility, and can result in important reductions of design costs. STRONGAnalysis and Synthesis of Distributed Real-Time Embedded Systems will be of interest to advanced undergraduates, graduate students, researchers and designers involved in the field of embedded systems.