Automatic Generation Of Random Cell Layout

Design of VLSI Circuits

Microelectronics are certainly one of the key-technologies of our time. They are a key factor of technological and economic progress. They effect the fields of automation, information and communication, leading to the development of new applications and markets. Attention should be focused on three areas of development: • process and production technology, • test technology, • design technology. Clearly, because of the development of new application fields, the skill ~f design ing integrated circuits should not be limited to a few, highly specialized experts Rather, this ability should be made available to all system aDd design engineers as a new application technology - just like nrogramrning technology for software. For this reason, design procedures havt: to be developed which, supported by appropriate CAD systems, provide the desIgn englIl~I' with tools for representaltop effective instruments for design and reliable ·tools for verificatibn, ensuring simpre, proper and easily controllable interfaces for the manufacturing and test processes. Such CAD systems are called standard design systems. They open the way to fast and safe design of integrated circuits. First, this book demonstrates basic principles with an example of the Siemens design system VENUS, gives a general introduction to the method of designing integrated circuits, familiarizes the reader with basic semiconductor and circuit tech nologies, shows the various methods of layout design, and presents necessary con cepts and strategies of test technology.

Automatic Generation of Random Cell Layout

Design of Systems on a Chip: Design and Test

This book is the second of two volumes addressing the design challenges associated with new generations of semiconductor technology. The various chapters are compiled from tutorials presented at workshops in recent years by prominent authors from all over the world. Technology, productivity and quality are the main aspects under consideration to establish the major requirements for the design and test of upcoming systems on a chip.