A Hardware Compiler For Digital Optical Computing
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A Hardware Compiler for Digital Optical Computing
A hardware compiler for translating descriptions of digital circuits from a hardware description language (HDL) into gate-level layouts is under development at Rutgers University. The layouts are customized for optical processors that make use of arrays of optical logic gates interconnected in free-space with regular interconnection patterns such as perfect shuffles, crossovers, or global interconnects. Specific processors that the hardware compiler supports include the S-SEED based all-optical processor developed at AT & T Bell Labs, the S-SEED based all-optical processor under development at the Photonics Center at RADC/Griffiss AFB, and the acousto-optical modulator based RISC processor under development at OptiComp Corporation.
Spatial Light Modulator Technology
This work offers comprehensive coverage of all aspects of spatial light modulators, from the various optical materials used for modulation, through the availability and characteristics of specific devices, to the main applications of SLMs and related systems. The gamut of SLMs is surveyed, including multiple-quantum-well, acousto-optical, magneto-optical, deformable-membrane, ferroelectric-liquid-crystal and smart-pixel modulators.